Describe the components of the CPU - control unit, ALU, registers - and the buses connecting it to memory in the von Neumann architecture

What this dot point is asking

SEAB wants you to describe the CPU's components - the control unit, the arithmetic logic unit and registers - and the buses connecting the CPU to memory in the von Neumann architecture. The central idea is that a processor is a small set of cooperating parts wired to memory by buses, and that storing programs as data in the same memory is what makes a computer general-purpose.

The answer

The components of the CPU

A CPU has three kinds of internal component:

• Control unit (CU) - the coordinator. It fetches and decodes instructions and issues the control signals that tell every other part what to do and when. It directs the fetch-decode-execute cycle.
• Arithmetic logic unit (ALU) - the calculator. It performs arithmetic (add, subtract) and logic (AND, OR, NOT, comparisons) on data.
• Registers - tiny, very fast storage inside the CPU holding data and addresses currently in use (the PC, MAR, MDR, IR, accumulator, and general-purpose registers). They are faster than main memory.

The buses

The CPU communicates with main memory and devices over three buses (sets of parallel wires):

• Address bus - carries addresses from the CPU to memory, selecting a location. One direction. Its width sets how much memory can be addressed.
• Data bus - carries data and instructions between CPU and memory, in both directions. Its width (the word size) affects how much moves per transfer.
• Control bus - carries control and timing signals (read, write, clock) coordinating the system.

 CPU  <== data bus ==>  Memory
      == address bus =>
      <= control bus =>

The von Neumann architecture

In the von Neumann (stored-program) architecture, both instructions and data are held in the same main memory, fetched over the same bus. Because a program is just data in memory, it can be loaded, changed and replaced without rewiring the machine - this is what makes computers general-purpose.

The von Neumann bottleneck

Sharing one memory and one data bus for both instructions and data has a cost: the CPU cannot fetch an instruction and a data item simultaneously - they compete for the single bus. The processor may stall waiting for memory, limiting throughput. Caches and wider or additional buses help relieve this von Neumann bottleneck.

Performance factors

How fast a CPU executes depends on the clock speed (cycles per second), the number of cores (parallel execution units), the word size / data bus width, and the cache size.

Examples in context

Example 1. Why more memory needs a wider address bus. A 32-bit address bus can select $2^{32}$ locations (about 4 GB); addressing more memory requires more address lines (a wider bus), which is one reason 64-bit systems became necessary. The bus width directly limits the addressable memory.

Example 2. Multi-core processors. A modern CPU packs several cores, each with its own control unit, ALU and registers, so they execute instructions in parallel. This sidesteps some of the single-core von Neumann bottleneck by doing genuinely independent work at once, which is why core count is a key performance figure alongside clock speed.

Try this

Q1. State the function of the control unit. [1 mark]

• Cue. It directs the processor - fetching and decoding instructions and issuing the control signals that coordinate the other components.

Q2. Which bus is bidirectional, and what does it carry? [2 marks]

• Cue. The data bus is bidirectional; it carries data and instructions between the CPU and memory in both directions.

Q3. What is meant by the von Neumann stored-program architecture? [2 marks]

• Cue. Instructions and data are held in the same main memory and fetched over the same bus, so programs are loadable as data, making the machine general-purpose.