How do computers store negative whole numbers, and why is two's complement the standard scheme?
Represent signed integers using two's complement, convert to and from denary, and perform subtraction by addition, explaining range and overflow
A focused answer to the H2 Computing outcome on signed integers. Two's complement encoding, converting to and from denary, subtraction as addition, the representable range, and detecting signed overflow.
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What this dot point is asking
SEAB wants you to represent signed whole numbers in two's complement, convert both ways with denary, perform subtraction by adding a negation, and explain the representable range and how overflow is detected. The key insight is that two's complement lets one ordinary binary adder handle both positive and negative numbers, which is why every modern processor uses it.
The answer
What two's complement means
In an -bit two's complement number the most significant bit has a negative weight of , while all other bits keep their usual positive weights. For 8 bits:
So . A leading always means the number is negative; a leading means it is non-negative.
Negating a number
To form the negative of any two's complement number: invert every bit, then add one. The same procedure undoes itself, so it converts to and back to .
+5 = 0000 0101
invert: 1111 1010
add 1: 1111 1011 = -5
Subtraction is addition
Because the negative is built into the encoding, is computed as . The processor has no separate subtractor: it negates and adds, discarding any carry out of the top bit.
The representable range
For bits the range is asymmetric:
For 8 bits that is to . There is exactly one representation of zero (), which is a key advantage over sign-and-magnitude.
Detecting overflow
Signed overflow happens when adding two numbers of the same sign produces a result of the opposite sign. Equivalently, overflow occurred if the carry into the sign bit differs from the carry out of it. Adding numbers of opposite signs can never overflow.
Examples in context
Example 1. Temperature sensors. A microcontroller reading that can go below zero stores its value in two's complement, so a reading of degrees is the byte . The same arithmetic unit that adds positive readings handles the negative one without extra circuitry.
Example 2. The year-2038 problem. Many systems counted seconds since 1970 in a 32-bit signed integer. Two's complement caps that count at seconds, which is reached in 2038; past it the value overflows to a large negative number, flipping the date to 1901. It is a direct consequence of the asymmetric signed range.
Try this
Q1. Represent in 8-bit two's complement. [2 marks]
- Cue. ; invert to , add 1 to get , so is all ones.
Q2. State the range of a 16-bit two's complement integer. [1 mark]
- Cue. to , that is to .
Q3. Does adding and (8-bit signed) overflow? Explain. [2 marks]
- Cue. gives ; two positives produced a negative, so yes, signed overflow occurred.
Exam-style practice questions
Practice questions written in the style of SEAB exam questions on this dot point, with worked answer explainers. The year tag is the paper they imitate, not the source.
Original5 marksUsing 8-bit two's complement: (a) represent in binary; (b) state the range of integers an 8-bit two's complement number can hold; (c) explain why two's complement is preferred over a separate sign bit.Show worked answer →
(a) First write in 8-bit binary: . To negate in two's complement, invert all bits then add 1.
+37: 0 0 1 0 0 1 0 1
invert: 1 1 0 1 1 0 1 0
add 1: 1 1 0 1 1 0 1 1
So .
(b) An 8-bit two's complement number holds to , that is to .
(c) With a separate sign-and-magnitude scheme there are two representations of zero and addition needs special-case logic. Two's complement has a single zero and lets the same binary adder handle both positive and negative numbers, so subtraction becomes addition of the negation.
Markers reward the invert-and-add-one method, the correct asymmetric range, and the single-zero or unified-adder justification.
Original4 marksCompute using 8-bit two's complement arithmetic. Show the negation of , the addition, the 8-bit result, and convert the result back to denary.Show worked answer →
Subtraction is addition of the negation, so compute .
. Negate: invert to , add 1 to get .
. Add:
00110100 (+52)
10111010 (-70)
---------
11101110
The result has its top bit set, so it is negative. Negate it to read the magnitude: invert to , add 1 to get . So the result is , which matches .
Markers reward negation by invert-and-add-one, the binary addition, recognising the negative result from the sign bit, and reading back the magnitude.
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